Area: | Department of Electrical and Computer Engineering |
Credits: | 12.5 |
Contact Hours: | 4.0 |
Lecture: | 1 x 2 Hours Weekly |
Tutorial: | 1 x 1 Hours Fortnightly |
Laboratory: | 1 x 3 Hours Fortnightly |
Prerequisite(s): | 12702 (v.2) Computer Engineering 103 or any previous version
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Syllabus: | Combinational Logic Circuit Design; Sequential Circuit Design; Registers and Counters; Memory and Programmable Logic Devices, Datapaths; Control Unit, Algorithm State Machines; Instruction Set Architecture; Input-Output and Communication; Memory Systems. |
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Texts and references listed below are for your information only and current as of September 30, 2003. Some units taught offshore are modified at selected locations. Please check with the unit coordinator for up-to-date information and approved offshore variations to unit information before finalising study and textbook purchases. |
Unit References: | Mano MM and Kime CR (2000) Logic and Computer Design Fundamentals, 7th ed, Prentice Hall. |
Unit Assessment Breakdown: | Assignments 15%. Examination 50%. Laboratory 20%. Mid-Semester Exam 15%. Failing twice in this unit may lead to termination of your course. This is a grade/mark assessment. |
Field of Education: | 31300 Electrical and Electronic Engineering and Technology (Narrow Grouping) | HECS Band (if applicable): | 2 |
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Extent to which this unit or thesis utilises online information: | Not Online | Result Type: | Grade/Mark |
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Availability
| Year | Location | Period | Internal | Area External | Central External | | 2004 | Bentley Campus | Semester 1 | Y | | |
Area
External | refers to external course/units run by the School or Department, offered online or through Web CT, or offered by research. |
Central
External | refers to external course/units run through the Curtin Bentley-based Distance Education Area |
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