5508 (v.5) Computer Structures 602
| Area: | Department of Electrical and Computer Engineering |
| Credits: | 25.0 |
| Contact Hours: | 5.0 |
| Lecture: | 1 x 2 Hours Weekly |
| Laboratory: | 1 x 3 Hours Weekly |
| Prerequisite(s): | 5507 (v.5) Computer Structures 601 or any previous version
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| Syllabus: | Concepts of concurrent process execution. Modelling concurrency - common classes of concurrent algorithms. Granularity and communication. Architectural models of concurrent processing - closely and loosely coupled systems. Control and data flow issues. Network organisational issues - topologies, latency hiding techniques, routing. Performance modelling of concurrent structures. Design issues with event driven systems. |
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| Text and references listed above are for your information only and current as of September 30, 2003. Please check with the unit coordinator for up-to-date information. |
| Unit References: | Selected references from the literature such as IEEE Computer, IEEE Micro and IEEE Transactions on Parallel and Distributed Systems. |
| Unit Texts: | Hennessy and Patterson, (1996). Computer Architecture: A Quantitative Approach, 3rd ed, San Francisco, California, Morgan Kaufman. |
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| Unit Assessment Breakdown: | Examination 25%. Seminar Reports 30%. Laboratory/Design Studies 30%. Assignment 15%. This is by grade/mark assessment. |
| Year | Location | Period | Internal | Area External | Central External | | 2004 | Bentley Campus | Semester 2 | Y | | | |
Current as of: February 2, 2004
CRICOS provider code 00301J
