12702 (v.2) Computer Engineering 103

Area:

Department of Electrical and Computer Engineering

Credits:

25.0

Contact Hours:

4.0

Lecture:

1 x 2 Hours Weekly

Tutorial:

1 x 1 Hours Weekly

Laboratory:

1 x 2 Hours Fortnightly

Syllabus:

Number systems. Logic gates. Boolean functions. Karnaugh maps and minimisation. Sequential logic, Flip flops and registers. Data representations and arithmetic. Computer organisations. Processor architecture, Instruction sets. Assembly Language Programming Simple input/output techniques. Computer Peripheral devices.

Unit Outcomes:

At the completion of the unit the student, will be able to analyse basic digital logic circuits to determine their transfer functions and analyse the standard building blocks of combinatorial circuits. They will learn design of simple combinatorial digital circuits using Karnaugh Maps and simple synchronous sequential logic circuits using a variety of storage elements. They will gain an understanding of the concepts of a programmable system and in programming models for simple microprocessors and be able to analyse and write small programs in the associated assembly language for a specific microporcessor. Finally, they will be able to understand the concept and implementation of input/output (I/O) operations for a programmable system and be able to code simple I/O operations for a specific microprocessor and shall present a report demonstrating the knowledge of logical systems and programmable systems.

Text and references listed above are for your information only and current as of September 30, 2003. Please check with the unit coordinator for up-to-date information.

Unit References:

No prescribed references.

Unit Texts:

MANO, M.M. and KIME, C.R., 2000, 'Logic and Computer Design Fundamentals', 2nd Edition, Prentice-Hall, New York. Spasov, P., 1999, 'Microcontroller Technology The 68HC11', 4th Edition, Prentice-Hall, New York.

Unit Assessment Breakdown:

Final Examination 60%. Laboratory 24%. 4 x On-line Tests 16%.

Year	Location	Period	Internal	Area External	Central External
2004	Bentley Campus	Semester 1	Y